| dc.description |
First and foremost, we would like to give thanks to our parents who have been a constant pillar of support for us throughout university. This would not have been possible without their comforting words and motivation.
To Dr. Md. Forkan Uddin, Associate Professor, Department of Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology, for your help in our understanding of constructive advice in the design and designing of this subthreshold region operated MOSFET, helping us in the various analysis, the proof readings of our rough drafts as well as for helping us in our academics. We would not have been able to do this without your effort.
We would like to extend our regards to them who directly and indirectly helped us during this journey. |
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| dc.description.abstract |
As data storage devices, MOSFETs have been used for a long time. However, the data storage mainly involves the digital characteristics and so the analog especially high frequency appliances have been neglected for long and BJT have been the analog designer’s choice. With the miniaturization and low power devices on demand, the analog designers have been tiled towards MOSFET and more models are being developed in subthreshold regime as subthreshold is the region below the threshold voltage that can operate with a current less than the subthreshold current, thus achieving low energy with a performance penalty in terms of frequency. However, in this era of technology where everyone is aiming to achieve the greatest speed possible, frequency penalty is unacceptable. So, in this paper, we explore the performance parameters and find optimum solutions for which frequency will not be forsaken to operate low voltage devices. In this regard, we explore high performance speed and power degradation parameters, transition frequency, Ft and gate capacitance, 𝐶𝑔 and analyze their graphical relationships with device design parameters, i.e., channel length L, channel width, W and applied gate to source voltage, Vgs. We formulate an optimization problem to find the optimal design of a subthreshold MOSFET device. The optimization problem is found to be a convex problem. We solve the optimization problem using an optimization tool. The numerical results show that the proposed optimization based design approach is able to minimize the gate capacitance, 𝐶𝑔 and maximize the transition frequency, Ft. |
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